T. S. Udhaya Suriya¹ and P. Rangarajan², ¹Adhiyamaan College Engineering, India and ²RMD College of Engineering and Technology, India

The MAC architecture is used in real time digital signal processing and multimedia information processing which requires high throughput. A novel method to estimate the transition activity at the nodes of a multiplier accumulator architecture based on modified booth algorithm implementing finite impulse response filter is proposed in this paper. The input signals are described by a stationary Gaussian process and the transition activity per bit of a signal word is modeled according to the dual bit type (DBT) model. This estimation is based on the mathematical formulation by multiplexing mechanism on the breakpoints of the DBT model.

Digital Signal Processing (DSP), MAC, dual-bit type (DBT), multiplexing mechanism, signal transition activity, word level activity